The present invention relates to voltage regulator circuits. More particularly, the present invention relates to circuits and methods for improving the efficiency of step down switching regulators converting a high input voltage to a low output voltage. Furthermore, the present invention relates to circuits and methods to achieve such efficiency improvements while maintaining controllability during light output load conditions.
The purpose of a voltage regulator is to provide a substantially constant output voltage to a load from an input voltage source which may be poorly-specified or fluctuating. Generally there are two different types of regulators: linear regulators and switching regulators.
A linear regulator employs a pass element (e.g., a power transistor) coupled in series with a load and controls the voltage drop across the pass element to regulate the voltage which appears at the load. In contrast, a switching regulator employs a switch including a switching element (e.g., a power transistor) coupled in series or parallel with the load. The switching regulator controls the timing of the turning ON and turning OFF of the switching element (i.e., the duty cycle) to regulate the flow of power to the load. Typical switching regulators employ inductive energy storage elements to convert switched current pulses into a steady load current. Thus, power in a switching regulator is transmitted across the switch in discrete current pulses, whereas power in a linear regulator is transmitted across the pass element as a steady flow of current.
Switching regulators are generally more efficient than linear regulators (where efficiency is defined as the ratio of the power provided by the regulator to the power provided to the regulator). Because of this, switching regulators are often employed in portable battery-powered systems such as cellular telephones, cordless telephones, pagers, personal communicators, laptop computers, and wireless modems. The high efficiency offered by switching regulators offers extended battery life in such applications. A second advantage is the reduction in waste heat generated. This waste heat corresponds to the difference between the power provided to the regulator and the power provided by the regulator.
One significant component of operating loss in switching regulators is the power dissipated by the switching element. This power loss can be expressed as the product of the voltage drop across the switching element multiplied by the current through it. Indeed, average switch power loss can be calculated by numerically integrating the instantaneous switch power loss over an entire switching cycle. By convention, this power loss is defined to include a DC (or more properly "pseudo-DC") component and an AC component. The so-called DC component is more straightforward and represents the net power lost while the switch is completely, or nearly completely in its "ON" state. By contrast, the AC component represents net power lost when the switching element is in transition between "ON" and "OFF" states. In systems operating at a low "ON" duty cycle, the AC switching loss can become quite appreciable, and even exceed the DC component.
For example, in step-down or "buck" switching regulators, the combination of high input voltage and low output voltage results in a low "ON" duty cycle. Maintaining acceptable efficiency in such applications requires correspondingly rapid dV/dt and dI/dt behavior in the switch in order to minimize the transitions between "ON" and "OFF" states, thereby controlling AC switching loss.
A conventional bipolar integrated circuit process technology is a logical choice to implement such a buck converter. The process is inexpensive and offers the high breakdown voltage required to support high input voltage operation. For such a converter, the obvious choice for the actual switching element is an NPN power transistor operating in an emitter follower mode, with its collector coupled to the input voltage supply and its emitter coupled to the output node through an inductor. Such a configuration typically will require a lateral PNP connected between the collector and base of the output NPN transistor. This PNP transistor is then driven to saturation to pull the base of the output NPN as high as possible to minimize DC loss. However, the relatively slow nature of the lateral PNP yields unacceptable AC switching losses. Better AC performance may be obtained by using a second, smaller NPN transistor coupled to the output NPN in a Darlington configuration, this to be driven by a lateral PNP transistor. However, this configuration results in higher DC losses.
Prior art has included the use of a bootstrap node, which is driven above the input supply voltage. This allows controlled saturation of the NPN output device, thus minimizing DC losses, but there are potential disadvantages to this approach. The extra node required by the circuit topology uses up a valuable integrated circuit package pin. Additional circuit components are required to support the bootstrap node, adding to cost and complexity. And, with regard to the high input voltage applications of interest, the extra voltage headroom required for the bootstrap node limits maximum allowed input voltage.
A further potential problem (with or without a bootstrap node) is light load controllability. A circuit topology capable of delivering the fast dV/dt and dI/dt behavior required to reduce AC switching losses to an acceptable level will likely exhibit pulse skipping behavior at light output load. This is because the relatively slow lateral PNPs involved effectively set a lower limit on allowable output switch "ON" time (i.e., a minimum duty cycle). When the power required by the output load falls below that delivered by these periodic minimum width pulses, the converter will be forced into some sort of pulse skipping behavior to further limit delivered output power and maintain output voltage regulation. Such pulse skipping behavior is generally considered undesirable, as the resulting subharmonic behavior can result in electrical and/or audible noise interference.
In view of the foregoing, it would be desirable to provide a circuit and method for providing high dV/dt and dI/dt behavior during switch transitions to minimize AC switching losses.
It would also be desirable to provide low forward voltage drop in the switch "ON" state to minimize DC switching losses, without the use of a bootstrap node.
It would also be desirable to provide a method of avoiding pulse skipping behavior during lightly loaded conditions.